CS604 Assignment 3 Solution
#1
CS604 Operating System
Assignment 3 Solution
Semester: Spring 2017



Question No. 1 (05 marks):

There is a system with 16 tape drives and four processes. To follow the deadlock avoidance algorithm creates a Safe Sequence of the following processes by calculating the available tape drives.
Initial Available tap drive = 2

Solution:
Safe Sequence: P1, P3, P2, P0




Question No. 2 (05 marks):

Considering the following constraints, calculate the effective access time of finding a page table entry in the TLB. Write down the all calculating steps.
 
Tmem = 200 nsec
TTLB = 30 nsec
Hit ratio is 70%
Teffective = ?



Solution:

Formula for Teffective:

Teffective = Hit ratio(TTLB + Tmem) + miss ratio(TTLB + 2 * Tmem)Nanoseconds.

Question No. 3 (05 marks):

 

Suppose, Logical address space = 32 bits, Page size = 8k, Process address space = 4GB and Main memory RAM = 512 MB

 

Then calculate the following

 

•        Maximum pages in a process address space

•        Address bits p (page number) and d (offset)

•        No. of frames

•        Frame size |f|

•        Physical address



Solution:
  • Process Address Space / Page Size
  • d = log2 Page Size
  • p = Logical Address Space - d
  • No. of Frames = RAM / Page Size
  • |f| = log2 (No. of Frames)
  • Physical Address = |f| + d
#2
(07-25-2017, 10:29 AM)Pakistani Wrote: CS604 Operating System
Assignment 3 Solution
Semester: Spring 2017



Question No. 1 (05 marks):

There is a system with 16 tape drives and four processes. To follow the deadlock avoidance algorithm creates a Safe Sequence of the following processes by calculating the available tape drives.
Initial Available tap drive = 2

Solution:
Safe Sequence: P1, P3, P2, P0




Question No. 2 (05 marks):

Considering the following constraints, calculate the effective access time of finding a page table entry in the TLB. Write down the all calculating steps.
 
Tmem = 200 nsec
TTLB = 30 nsec
Hit ratio is 70%
Teffective = ?



Solution:

Formula for Teffective:

Teffective = Hit ratio(TTLB + Tmem) + miss ratio(TTLB + 2 * Tmem)Nanoseconds.

Question No. 3 (05 marks):

 

Suppose, Logical address space = 32 bits, Page size = 8k, Process address space = 4GB and Main memory RAM = 512 MB

 

Then calculate the following

 

•        Maximum pages in a process address space

•        Address bits p (page number) and d (offset)

•        No. of frames

•        Frame size |f|

•        Physical address



Solution:
  • Process Address Space / Page Size
  • d = log2 Page Size
  • p = Logical Address Space - d
  • No. of Frames = RAM / Page Size
  • |f| = log2 (No. of Frames)
  • Physical Address = |f| + d


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#3
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